西维蜀黍

【Golang】使用 - Concatenate String

Clean and simple string building

For simple cases where performance is a non-issue, fmt.Sprintf is your friend. It’s clean, simple and fairly efficient.

s := fmt.Sprintf("Size: %d MB.", 85) // s == "Size: 85 MB."
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【Golang】使用 - Unsafe Pointers

Background

Although the restrictions on type-safe pointers really make us be able to write safe Go code with ease, they also make some obstacles to write efficient code for some scenarios.

In fact, Go also supports type-unsafe pointers, which are pointers without the restrictions made for safe pointers. Type-unsafe pointers are also called unsafe pointers in Go. Go unsafe pointers are much like C pointers, they are powerful, and also dangerous. For some cases, we can write more efficient code with the help of unsafe pointers. On the other hand, by using unsafe pointers, it is easy to write bad code which is too subtle to detect in time.

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【NFC】macOS 连接 ACR122U

安装 libnfc

ACR122U 是一款 NFC (Near Field Communication) 读卡器。要在 macOS 上使用 ACR122U,通常需要安装相应的驱动程序和库。

via brew

运行以下命令安装 libnfc:

brew install libnfc

via 手工编译

$ brew install libtool automake autoconf libusb pkg-config
$ git clone https://github.com/nfc-tools/libnfc
$ autoreconf -vis
$ ./configure --with-drivers=acr122_pcsc
$ sudo make clean all && sudo make && sudo make install
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【Operating System】进程 - 进程间通讯 - Memory Barrier/Fence

Memory Barrier/Fence

A memory barrier, also known as a membar, memory fence or fence instruction, is a type of barrier instruction that causes a central processing unit (CPU) or compiler to enforce an ordering constraint on memory operations issued before and after the barrier instruction. This typically means that operations issued prior to the barrier are guaranteed to be performed before operations issued after the barrier.

Memory barriers are necessary because most modern CPUs employ performance optimizations that can result in out-of-order execution. This reordering of memory operations (loads and stores) normally goes unnoticed within a single thread of execution, but can cause unpredictable behaviour in concurrent programs and device drivers unless carefully controlled. The exact nature of an ordering constraint is hardware dependent and defined by the architecture’s memory ordering model. Some architectures provide multiple barriers for enforcing different ordering constraints.

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【Operating System】进程 - 上下文切换

Switching cases

There are three potential triggers for a context switch:

Multitasking

Most commonly, within some scheduling scheme, one process must be switched out of the CPU so another process can run. This context switch can be triggered by the process making itself unrunnable, such as by waiting for an I/O or synchronization operation to complete.

On a pre-emptive multitasking system, the scheduler may also switch out processes that are still runnable. To prevent other processes from being starved of CPU time, pre-emptive schedulers often configure a timer interrupt to fire when a process exceeds its time slice. This interrupt ensures that the scheduler will gain control to perform a context switch.

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